Project Settings |
---|
Project Name | WideMultTop_syn | Device Name | synthesis: Microchip PolarFire : MPF100T |
Implementation Name | synthesis | Top Module | WideMultTop |
Retiming | 1 | Resource Sharing | 1 |
Fanout Guide | 10000 | Disable I/O Insertion | 1 |
Disable Sequential Optimizations | 0 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
56 |
334 |
0 |
- |
00m:06s |
- |
11/24/2021 9:50:37 AM |
(premap) | Complete |
24 |
0 |
0 |
0m:02s |
0m:01s |
211MB |
11/24/2021 9:50:41 AM |
(fpga_mapper) | Complete |
1505 |
2722 |
0 |
0m:29s |
0m:29s |
280MB |
11/24/2021 9:51:11 AM |
Multi-srs Generator |
Complete | | | | 00m:01s | | | 11/24/2021 9:50:39 AM |
Area Summary |
| |
Carry Cells | 1036 |
Sequential Cells | 10601 |
DSP Blocks
(dsp_used) | 80 |
Global Clock Buffers | 2 |
RAM64x12
(v_ram) | 34 |
LUTs
(total_luts) | 1186 |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
clock | 156.3 MHz | 215.3 MHz | 1.756 |
Optimizations Summary |
Retiming | 2 / 4 |
Combined Clock Conversion | 1 / 0 |
|